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VN771K
Quad smart power solid state relay for complete H-bridge configurations
Features
Type VN771K RDS(on) 95 m(1) IOUT 9 A(2) VCC 36 V
1. Total resistance of one side in bridge configuration 2. Typical current limitation value
Suited as low voltage bridge Linear current limitation Very low standby power dissipation Short circuit protected Status flag diagnostic (open drain) Integrated clamping circuits Undervoltage protection ESD protection
SO-28
This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application. The dual high side switches have built-in thermal shutdown to protect the chips from over temperature and current limiter blocks to protect the device from short circuit. Status output is provided to indicate open load in off and on-state and over temperature. The low side switches are two OMNIFET II types (fully auto protected Power MOSFET in VIPowerTM technology). They have built-in thermal shutdown, linear current limitation and overvoltage clamping. Fault feedback for thermal intervention can be detected by monitoring the voltage at the input pin.
Description
The VN771K is a device formed by three monolithic chips housed in a standard SO-28 package: a double high side and two low side switches. Both the double high side and low side switches are made using STMicroelectronics VIPowerTM M0-3 Technology.
Table 1.
Device summary
Order codes Package Tube SO-28 VN771K Tape and reel VN771K13TR
July 2009
Doc ID 12534 Rev 4
1/33
www.st.com 1
Contents
VN771K
Contents
1 2 Block diagrams and pins descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 2.2 2.3 2.4 2.5 2.6 2.7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics for dual high side switch . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics for low side switches . . . . . . . . . . . . . . . . . . . . 11 Dual high-side switch timing data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical characterization for dual high side switch . . . . . . . . . . . . . . . . . 16 Electrical characterization for low side switches . . . . . . . . . . . . . . . . . . . . 19
3 4
Application recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1 4.2 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Thermal calculation in clockwise and anti-clockwise operation in steady state mode 27
4.2.1 4.2.2 4.2.3 4.2.4 Thermal resistances definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . 27 Single pulse thermal impedance definition . . . . . . . . . . . . . . . . . . . . . . 27 Pulse calculation formula . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1 5.2 5.3 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 SO-28 tube shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Tape and reel shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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VN771K
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin definition and function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Dual high side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Low side switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power outputs (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (per each channel) (VCC= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic input (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Status pin (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Openload detection (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 On-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal calculation in clockwise and anti-clockwise operation in steady state mode . . . . 27 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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List of figures
VN771K
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Open-load status timing (with external pull-up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Over temperature status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Openload on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Openload off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Turn-on current slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Turn-on current slope (Vin=3.5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Switching time resistive load (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Switching time resistive load (Rg=10Ohm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Source drain diode forward characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Static drian source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Static drain source on resistance vs input voltage (Id=7A) . . . . . . . . . . . . . . . . . . . . . . . . . 21 Static drain source on resistance vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Turn-off drain source voltage slope (Vin=3.5V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Turn-off drain source voltage slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Application diagram bridge drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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VN771K Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55.
List of figures Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26 SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 28 SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28 Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Tube dimensions (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Tape and reel dimensions (suffix "13TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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Block diagrams and pins descriptions
VN771K
1
Figure 1.
Block diagrams and pins descriptions
Block diagram
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Doc ID 12534 Rev 4
VN771K Table 2.
No 1, 3, 25, 28 2 4, 11 5, 10, 19, 24 6 7 8 9 12, 14, 15, 18 13 16, 17 20, 21 22, 23 26, 27
Block diagrams and pins descriptions Pin definition and function
Name DRAIN 3 INPUT 3 N.C. VCC GND INPUT 1 DIAGNOSTIC INPUT 2 DRAIN 4 INPUT 4 SOURCE 4 SOURCE 2 SOURCE 1 SOURCE 3 Function Drain of switch 3 (low-side switch) Input of switch 3 (low-side switch) Not connected Drain of switches 1 and 2 (high-side switches) and power supply voltage Ground of switches 1 and 2 (high-side switches) Input of switch 1 (high-side switches) Diagnostic of switches 1 and 2 (high-side switches) Input of switch 2 (high-side switch) Drain of switch 4 (low-side switch) Input of switch 4 (low-side switch) Source of switch 4 (low-side switch) Source of switch 2 (high-side switch) Source of switch 1 (high-side switch) Source of switch 3 (low-side switch)
Figure 2.
Connection diagram
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Electrical specifications
VN771K
2
2.1
Electrical specifications
Thermal data
Table 3.
Symbol Rthj-case Rthj-case Rthj-amb
Thermal data
Parameter Thermal resistance junction-case (high side switch) Thermal resistance junction-case (low side switch) Thermal resistance junction-ambient (with 6 cm2 of Cu heat sink) Value Max (C/W) 20 20 See Figure 49
2.2
Absolute maximum ratings
Table 4.
Symbol VCC -VCC -IGND IOUT -IOUT IIN ISTAT DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current DC status current Electrostatic discharge (human body model: R = 1.5K; C = 100pF) - Input - Status - Output - VCC Power dissipation (TC =25C) Junction operating temperature Case operating temperature Storage temperature
Dual high side switch
Parameter Value 41 -0.3 -200 Internally limited -6 10 10 Unit V V mA A A mA mA
VESD
4000 4000 5000 5000 6 Internally limited -40 to 150 -55 to 150
V V V V W C C C
Ptot Tj Tc Tstg
Table 5.
Symbol VDS VIN IIN
Low side switch
Parameter Drain source voltage (VIN = 0V) Input voltage Input current Value Internally clamped Internally clamped 20 Unit V V mA
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VN771K Table 5.
Symbol RIN MIN ID IR VESD1 VESD2 Ptot T
j
Electrical specifications Low side switch (continued)
Parameter Minimum input series impedance Drain current Reverse DC output current Electrostatic discharge (R = 1.5K, C = 100pF) Electrostatic discharge on output pin only (human body model: R = 330, C = 150pF) Power dissipation (TC = 25C) Operating junction temperature Case operating temperature Storage temperature Value 10 Internally limited -15 4000 5000 6 Internally limited Internally limited -55 to 150 Unit A A V V W C C C
Tc Tstg
2.3
Electrical characteristics for dual high side switch
8V < VCC< 36V; -40C < Tj < 150C, unless otherwise specified. Table 6.
Symbol VCC(1) VUSD(1) VOV(1) RON
Power outputs (per each channel)
Parameter Operating supply voltage Undervoltage shutdown Overvoltage shutdown On-state resistance IOUT =2A; Tj =25C IOUT =2A; VCC >8V Off-state; VCC = 13V; VIN =VOUT =0V Off-state; VCC = 13V; VIN =VOUT =0V; Tj =25C On-state; VCC = 13V; VIN =VOUT =0V; VCC =36V; Tj = 125C VIN =0V; VOUT =3.5V VIN =VOUT =0V; VCC = 13V; Tj = 125C VIN =VOUT =0V; VCC = 13V; Tj = 25C Test conditions Min 5.5 3 36 Typ 13 4 12 12 5 0 -75 Max 36 5.5 60 120 40 25 7 50 0 5 3 Unit V V V m m A A mA A A A A
IS(1)
Supply current
-
IL(off1) IL(off2) IL(off3) IL(off4)
Off-state output current Off-state output current Off-state output current Off-state output current
1. Per device.
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Electrical specifications Table 7.
Symbol td(on) td(off) dVOUT/dt(on) dVOUT/dt(off)
VN771K
Switching (per each channel) (VCC= 13V)
Parameter Turn-on delay time Turn-off delay time Turn-on voltage slope Turn-off voltage slope Test conditions RL =6.5 from VIN rising edge to VOUT =1.3V RL =6.5 from VIN falling edge to VOUT = 11.7V RL =6.5 from VOUT = 1.3V to VOUT = 10.4V RL =6.5 from VOUT = 11.7V to VOUT =1.3V Min Typ 30 30 See relative diagram See relative diagram Max Unit s s V/s V/s
Table 8.
Symbol VIL IIL VIH IIH VI(hyst) VICL
Logic input (per each channel)
Parameter Input low level Low level input current VIN = 1.25V Input high level High level input current VIN = 3.25V Input hysteresis voltage Input clamp voltage IIN = 1mA IIN = -1mA Test conditions Min 1 3.25 0.5 6 Typ 6.8 -0.7 Max 1.25 10 8 Unit V A V A V V V
Table 9.
Symbol VSTAT ILSTAT CSTAT VSCL
Status pin (per each channel)
Parameter Status low output voltage Test conditions ISTAT = 1.6 mA Min 6 Typ 6.8 -0.7 Max 0.5 10 100 8 Unit V A pF V V
Status leakage current Normal operation; VSTAT = 5V Status pin input capacitance Status clamp voltage Normal operation; VSTAT = 5V ISTAT = 1mA ISTAT = -1mA
Table 10.
Symbol TTSD TR Thyst
Protections (per each channel)
Parameter Shutdown temperature Reset temperature Thermal hysteresis Test conditions Min 150 135 7 Typ 175 15 Max 200 Unit C C C
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VN771K Table 10.
Symbol tSDL
Electrical specifications Protections (per each channel) (continued)
Parameter Status delay in overload conditions Current limitation Test conditions Tj >TTSD Min 6 8.5 Typ 9 Max 20 15 15 15 Unit s A A A V
Ilim
Tj = 125C 5.5V < VCC <36V IOUT =2A; L=6mH
Vdemag
Turn-off output clamp voltage
VCC-41 VCC-48 VCC-55
Note:
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 11.
Symbol IOL tDOL(on)
Openload detection (per each channel)
Parameter Openload on-state detection threshold Openload on-state detection delay Openload off-state voltage detection threshold Openload detection delay at turn-off Test conditions VIN = 5V IOUT = 0A Min 50 Typ 100 Max 200 200 Unit mA s
VOL
VIN = 0V
1.5
2.5
3.5
V
tDOL(off)
-
-
1000
s
2.4
Electrical characteristics for low side switches
-40C < Tj < 150C, unless otherwise specified. Table 12.
Symbol VCLAMP VCLTH VINTH IISS
Off-state
Parameter Drain source clamp voltage Drain source clamp threshold voltage Input threshold voltage Supply current from input pin Test conditions VIN =0V; ID = 7A VIN =0V; ID =2mA VDS =VIN; ID =1mA VDS =0V; VIN = 5V Min 40 36 0.5 Typ 45 100 Max 55 2.5 150 Unit V V V A
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Electrical specifications Table 12.
Symbol VINCL
VN771K
Off-state (continued)
Parameter Input-source clamp voltage Zero input voltage drain current (VIN =0V) Test conditions IIN =1mA IIN =-1mA VDS = 13V; VIN =0V; Tj =25C VDS = 25V; VIN =0V Min 6 -1.0 Typ 6.8 Max 8 -0.3 30 75 Unit V
IDSS
-
A
Table 13.
Symbol RDS(on)
On-state
Parameter Test conditions Min Typ Max 35 70 Unit m
Static drain source on VIN =5V; ID =7A; Tj = 25C resistance VIN =5V; ID =7A
Tj = 25C, unless otherwise specified. Table 14.
Symbol gfs(1) COSS
Dynamic
Parameter Forward trans conductance Output capacitance Test conditions VDD =13V; ID =7A VDS = 13V; f = 1 MHz; VIN = 0V Min Typ 18 400 Max Unit S pF
1. Pulsed: Pulse duration = 300s, duty cycle 1.5%
Table 15.
Symbol td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi
Switching
Parameter Turn-on delay time Rise time Turn-off delay time Fall time Turn-on delay time Rise time Turn-off delay time Fall time Turn-on current slope Total input charge VDD =15V; ID =7A Vgen =5V; Rgen = RIN MIN =10 VDD =12V; ID =7A; VIN =5V Igen = 2.13mA VDD =15V; ID =7A Vgen =5V; Rgen =2.2K VDD =15V; ID =7A Vgen =5V; Rgen = RIN MIN =10 Test conditions Min Typ 80 350 450 150 1.5 9.7 9 10.2 16 36.8 Max 250 1000 1350 500 4.5 30 25 30 Unit ns ns ns ns s s s s A/s nC
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VN771K Table 16.
Symbol VSD(1) trr Qrr IRRM
Electrical specifications Source drain diode
Parameter Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7A; dI/dt = 40A/s VDD = 30V; L = 200H Test conditions ISD =7A; VIN =0V Min Typ 0.8 300 0.80 5 Max Unit V ns C A
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
-40C < Tj < 150C, unless otherwise specified. Table 17.
Symbol Ilim tdlim Tjsh Tjrs Igf Eas
Protections
Parameter Drain current limit Step response current limit Over temperature shutdown Over temperature reset Fault sink current Single pulse avalanche energy VIN = 5V; VDS =13V; Tj =Tjsh starting Tj =25C; VDD = 24V VIN =5V; Rgen = RIN MIN =10; L=24mH Test conditions VIN =5V; VDS =13V VIN =5V; VDS =13V; Tj =125C VIN =5V; VDS = 13V Min 12 15 150 135 10 400 Typ 18 Max 24 24 20 Unit A A s C C mA mJ
45 175 15 -
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Electrical specifications
VN771K
2.5
Dual high-side switch timing data
Figure 3. Switching time waveforms
Table 18.
Truth table
Input L H L H H L H L H L H L H L H Output L H L X X L L L L L L H H L H Status H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L
Conditions Normal operation
Current limitation
Over temperature Undervoltage Overvoltage Output voltage > VOL Output current < IOL
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VN771K Figure 4. Open-load status timing (with external pull-up)
Electrical specifications
Figure 5.
Over temperature status timing
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Electrical specifications
VN771K
2.6
Figure 6.
Electrical characterization for dual high side switch
Off-state output current Figure 7. Input clamp voltage
Figure 8.
High level input current
Figure 9.
Input high level voltage
Figure 10. Input low level voltage
Figure 11.
Input hysteresis voltage
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VN771K Figure 12. Overvoltage shutdown Figure 13. ILIM vs Tcase
Electrical specifications
Figure 14. Turn-on voltage slope
Figure 15. Turn-off voltage slope
Figure 16. On-state resistance vs Tcase
Figure 17. On-state resistance vs VCC
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Electrical specifications Figure 18. Status leakage current Figure 19. Status low output voltage
VN771K
Figure 20. Openload on-state detection threshold
Figure 21. Openload off-state voltage detection threshold
Figure 22. Status clamp voltage
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Electrical specifications
2.7
Electrical characterization for low side switches
Figure 24. Derating curve
Figure 23. Static drain source on resistance
Figure 25. Transconductance
Figure 26. Transfer characteristics
Figure 27. Turn-on current slope (Vin=5V)
Figure 28. Turn-on current slope (Vin=3.5V)
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Electrical specifications Figure 29. Input voltage vs input charge Figure 30. Capacitance variations
VN771K
Figure 31. Switching time resistive load (Vin=5V)
Figure 32. Switching time resistive load (Rg=10Ohm)
Figure 33. Output characteristics
Figure 34. Step response current limit
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VN771K Figure 35. Source drain diode forward characteristics
Electrical specifications Figure 36. Static drian source on resistance vs Id
v
Figure 37. Static drain source on resistance vs Figure 38. Static drain source on resistance vs input voltage (Id=7A) input voltage
Figure 39. Normalized input threshold voltage Figure 40. Normalized on resistance vs vs temperature temperature
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Electrical specifications
VN771K
Figure 41. Turn-off drain source voltage slope Figure 42. Turn-off drain source voltage slope (Vin=3.5V) (Vin=5V)
Figure 43. Current limit vs junction temperature
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Application recommendations
3
Application recommendations
Figure 44. Application diagram bridge drivers
Most motor bridge drivers use a reverse battery protection diode (D) inside the supply rail. This diode prevents a reverse current flow back to VBATT in case the bridge becomes disabled via the logic inputs while motor inductance still carries energy. In order to prevent a hazardous overvoltage at circuit supply terminal (VCC), a blocking capacitor (C) is needed to limit the voltage overshoot. As basic orientation, 50F per 1A load current is recommended. As an alternative, a Zener protection (Z) is also suitable. Even if a reverse polarity diode is not present, it is recommended to use a capacitor or Zener at VCC because a similar problem appears in case the supply terminal of the module has intermittent electrical contact to the battery or gets disconnected while the motor is operating.
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Application recommendations Figure 45. Recommended motor operation
VN771K
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VN771K Figure 46. Waveforms
Application recommendations
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Thermal data
VN771K
4
4.1
Thermal data
SO-28 thermal data
Figure 47. SO-28 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB thickness = 2mm, Cu thickness = 35m, Copper areas: from minimum pad layout to 6cm2). Figure 48. Chipset configuration LOW SIDE CHIP channel 3 RthB RthBC Figure 49. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition(a) RthAB HIGH SIDE CHIP channel 1,2 RthA RthAC LOW SIDE CHIP channel 4 RthC
a. see definitions in Section 5.2 on page 31
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VN771K
Thermal data
4.2
Table 19.
HS1 On Off HS2 Off On
Thermal calculation in clockwise and anti-clockwise operation in steady state mode
Thermal calculation in clockwise and anti-clockwise operation in steady state mode
LS3 Off On LS4 On Off TjHS12 PdHS1 x RthHS + PdLS4 x RthHSLS + Tamb PdHS2 x RthHS + PdLS3 x RthHSLS + Tamb TjLS3 TjLS4
PdHS1 x RthHSLS + PdLS4 PdHS1 x RthHSLS + PdLS4 x x RthLSLS + Tamb RthLS + Tamb PdHS2 x RthHSLS + PdLS3 PdHS2 x RthHSLS + PdLS3 x x RthLS + Tamb RthLSLS + Tamb
4.2.1
Thermal resistances definition
Values according to the PCB heatsink area. RthHS = RthHS1 = RthHS2 = high side chip thermal resistance junction to ambient (HS1 or HS2 in on-state) RthLS = RthLS3 = RthLS4 = low side chip thermal resistance junction to ambient RthHSLS = RthHS1LS4 = RthHS2LS3 = mutual thermal resistance junction to ambient between high side and low side chips RthLSLS = RthLS3LS4 = mutual thermal resistance junction to ambient between low side chips
4.2.2
Thermal calculation in transient mode(b)
TjHS12 = ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb TjLS3 = ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb TjLS4 = ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb
4.2.3
Single pulse thermal impedance definition
Values according to the PCB heatsink area. ZthHS = high side chip thermal impedance junction to ambient ZthLS = ZthLS3 = ZthLS4 = low side chip thermal impedance junction to ambient ZthHSLS = ZthHS12LS3 = ZthHS12LS4 = mutual thermal impedance junction to ambient between high side and low side chips ZthLSLS = ZthLS3LS4 = mutual thermal impedance junction to ambient between low side chips
4.2.4
Pulse calculation formula
Z TH =R TH +Z THtp (1 - )
where = tP/T
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
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Thermal data Figure 50. SO-28 HSD thermal impedance junction ambient single pulse
VN771K
Figure 51. SO-28 LSD thermal impedance junction ambient single pulse
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VN771K Figure 52. Thermal fitting model of an H-bridge in SO-28
Thermal data
Table 20.
Thermal parameters(1)
Footprint 1.5 2.6 2.6 15.5 10.5 62.28 150 1 0.00035 0.024 0.2 1.6 0.0009 1.61 1.7 3.25 52.28 44.28 32.28 1 2 6
Area/island (cm2) R1 = R6 (C/W) R2 (C/W) R12 = R17 (C/W) R3 = R13 = R 18 (C/W) R4 = R14 = R19 (C/W) R5 = R15 = R20 (C/W) R7 = R8 = R9 = R10 (C/W) R11 = R16 (C/W) C1 = C5 (W.s/C) C2 = C7 = C11 (W.s/C) C3 = C8 =C 12 (W.s/C) C4 = C9 = C13 (W.s/C) C6 = C10 (W.s/C)
1. The blank space means that the value is the same as the previous one.
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Package mechanical data
VN771K
5
5.1
Package mechanical data
SO-28 mechanical data
Figure 53. SO-28 package outline
Table 21.
DIM
SO-28 mechanical data
mm Min. Typ Max. 2.65 0.1 0.35 0.23 0.5 45 (typ.) 17.7 10 1.27 16.51 7.4 0.4 7.6 1.27 0.291 0.016 8 (max.) 18.1 10.65 0.697 0.393 0.050 0.650 0.299 0.050 0.713 0.419 0.3 0.49 0.32 0.004 0.013 0.009 0.020 Min. inch Typ. Max. 0.104 0.012 0.019 0.012
A a1 b b1 C c1 D E e e3 F L S
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Package mechanical data
5.2
SO-28 tube shipment
Figure 54. Tube dimensions (no suffix)
5.3
Tape and reel shipment
Figure 55. Tape and reel dimensions (suffix "13TR")
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Revision history
VN771K
6
Revision history
Table 22.
Date 01-Sep-2004
Document revision history
Revision 1 Initial release. Document formatted into new ST template Dimensions updated, seeFigure 55: Tape and reel dimensions (suffix "13TR") on page 31 Application diagram updated, seeFigure 44: Application diagram bridge drivers on page 23 Updated Table 3: Thermal data Updated note of Figure 47: SO-28 PC board. Updated Figure 48: Chipset configuration. Changes
31-Aug-2006
2
30-Jun-2009 10-Jul-2009
3 4
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